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Intel Foundry has secured what analysts are calling its largest external AI chip win in the company’s history. Google has placed orders for more than 3 million Tensor Processing Units to be manufactured by Intel in 2028, and Nvidia has begun early silicon trials on Intel’s 18A process for a next-generation multi-die GPU design. Both developments were first reported by The Information on June 8, sending Intel shares up 12%.

The Google TPU Order

Google produces its own TPU AI accelerators, manufactured almost entirely by TSMC. The new order puts Intel in the supply chain for AI chip fabrication at a scale that was not publicly expected.

The order covers 3 million-plus TPUs for 2028 manufacturing. Morgan Stanley estimates Google will produce over 6 million TPUs across 2027 and 2028 combined — which puts Intel’s order at roughly half of Google’s 2028 output. The deal followed months of validation work on Intel’s advanced packaging capabilities, specifically its EMIB (Embedded Multi-die Interconnect Bridge) technology, which competes with TSMC’s CoWoS system.

Intel’s EMIB yields have reached approximately 90%, a threshold that gives high-volume customers confidence in production viability. Google’s TPU v8e, expected in the second half of 2027, is likely to incorporate Intel EMIB for HBM integration. SK Hynix is also testing EMIB for HBM packaging, which is relevant as SK Hynix holds roughly 60-70% of the HBM supply for Nvidia’s Vera Rubin generation.

Nvidia’s 18A Evaluation

Nvidia’s engagement with Intel is earlier-stage but strategically significant. Nvidia is running multi-project wafer trials — a cost-sharing model where multiple customers place small designs on the same wafer to validate manufacturing feasibility — on Intel’s 18A process.

The stated target is Nvidia’s Feynman architecture, a next-generation GPU design expected in 2028. Feynman is reportedly being designed to integrate four GPU dies into a single package, a multi-die layout that places high demands on packaging technology. Intel’s 18A advanced packaging and interconnect capabilities are what Nvidia is evaluating for that design.

No production order has been placed. Nvidia’s current Blackwell and Vera Rubin generations are manufactured on TSMC’s 3nm process. Feynman is the earliest realistic entry point for Intel into Nvidia’s production supply chain.

Why Now

TSMC has repeatedly acknowledged that demand for advanced packaging capacity — specifically CoWoS for AI chip integration — exceeds supply. The AI hardware boom has created a structural constraint: the most expensive and capable AI accelerators all compete for the same packaging technology from the same manufacturer.

Intel’s foundry business has spent years attempting to attract external customers with limited success. That changed with the 18A ramp. Intel’s Panther Lake consumer processors, shipping on 18A, gave external customers a reference for manufacturing quality. The Google order is the first large-scale external AI chip production win; it validates Intel’s advanced packaging at volume for a hyperscaler customer.

The Apple connection is also relevant. Earlier reports indicated Apple has engaged Intel on chip manufacturing — its first foundry relationship outside TSMC for advanced silicon. Intel’s ability to attract Apple, Google, and now Nvidia evaluations across a single process generation is a different posture than anything Intel Foundry has managed in recent years.

Market Stakes

TSMC currently manufactures the dominant share of frontier AI accelerators: Nvidia GPUs, Google TPUs, AMD Instinct chips, and Amazon Trainium all run through TSMC fabs and packaging lines. A credible Intel Foundry supply chain for a meaningful fraction of Google TPUs, and the prospect of Nvidia evaluating it for Feynman, changes the competitive dynamic.

Intel’s stock reaction — up 12% on the reports — reflects how much the market had discounted the foundry turnaround. The gap between TSMC and Intel on advanced packaging yield has closed enough that two of the three largest AI chip buyers are either in production planning or active silicon validation with Intel.

Key Numbers

• 3M+: Google TPUs to be manufactured by Intel in 2028
• 6M: Google’s estimated total TPU output across 2027-2028
• 50%: Intel’s approximate share of Google’s 2028 TPU output
• 90%: Intel EMIB packaging yield
• 4: GPU dies per package in Nvidia’s Feynman target architecture
• 12%: Intel stock increase on the day of reporting
• 2028: Target year for both the Google volume order and Feynman architecture
• 18A: Intel process node under Nvidia evaluation