Huawei Claims 1.4nm Chip Density by 2031 Using a New Scaling Law — 3 Years Behind TSMC, Down From 5
Huawei’s semiconductor president He Tingbo delivered a rare public keynote at the 2026 IEEE International Symposium on Circuits and Systems in Shanghai on May 25, presenting the company’s most specific chip roadmap to date: 1.4-nanometre-equivalent transistor density by 2031.
The Gap, Quantified
China’s most advanced proven chipmaking capability sits at roughly 7nm, the node Huawei used in the Kirin 9000S and the SMIC-manufactured chips that caused significant attention in 2023. The global frontier is currently 2nm (TSMC’s current production node). TSMC plans to begin 1.4nm mass production in 2028.
Huawei’s 2031 target for 1.4nm means a three-year gap behind TSMC at that node — down from the roughly five-year gap that exists today. He Tingbo did not provide independent performance validation data to support the projection.
Tau Scaling Law
The mechanism Huawei is betting on is what it calls the Tau Scaling Law. Where Moore’s Law improves chips by making transistors smaller, Tau Scaling focuses on cutting signal and data travel times within chips and across computing systems. The implication is that performance can be improved even without access to the world’s most advanced photolithography equipment — the equipment the US has blocked China from acquiring.
He Tingbo said Huawei has already designed and mass-produced 381 chips using Tau Scaling Law principles over the past six years, across smartphones and AI computing applications.
LogicFolding, Kirin, and Ascend
The first consumer implementation of a Tau Scaling-derived architecture is LogicFolding, which Huawei says will launch inside Kirin chips this fall. LogicFolding shortens internal wiring within chips, reducing signal path lengths as a proxy for the density gains traditionally achieved through process shrinks.
Huawei said the same approach will be applied to its Ascend AI chips — the platform that powers Chinese AI training clusters — by 2030. If delivered, that would give China a domestic alternative at close to the global AI training chip frontier at a time when US export controls continue to tighten around NVIDIA’s H100, H200, and Blackwell lines.
What’s Not Proven
The announcement contains significant caveats. Huawei provided no independent data on achieved performance. The 1.4nm claim describes transistor density, not a specific process node — the distinction matters because density can be achieved through packaging and architecture choices that are distinct from raw lithographic capability. Bloomberg noted the five-year current gap and reported the claim without independent corroboration.
Whether Tau Scaling Law can actually close a fundamental manufacturing capability gap, or whether it represents an architectural efficiency layer that narrows but does not eliminate the disadvantage, will only become clear when Ascend chips ship in volume. The 2030 AI chip commitment and the 2031 consumer chip roadmap are now public benchmarks Huawei will be held to.