Google Launches 8th-Gen TPUs at Cloud Next '26 — Two Chips for Agentic AI, Virgo Network Unites 1M+ TPUs
Google announced the eighth generation of its Tensor Processing Units at Google Cloud Next ‘26, the first TPU generation to ship as two distinct chips engineered for different phases of agentic AI workloads. The announcement also introduced Virgo Network, a scale-out fabric that eliminates the physical boundary between machines and datacenters as a logical constraint.
Two Chips, One Agentic Thesis
Prior TPU generations were unified products optimised primarily for training throughput. The shift to two chips in the eighth generation reflects a structural change in how agentic workloads distribute across compute:
- One chip is oriented toward long-context inference and multi-step agent execution, where memory bandwidth and latency matter more than raw FLOP count
- The second chip targets the dense training and fine-tuning phases that feed updated model weights back into deployed agents
Google did not publish raw benchmark numbers for either chip at the time of announcement. The framing at Next ‘26 was architectural: the argument is that a single chip optimised for training cannot serve inference-latency constraints, and a chip optimised for inference cannot sustain the throughput required for continuous model update cycles that agentic systems require.
Virgo Network: The Fabric Underneath
The more immediately measurable claim is Virgo Network. Key specifications from the Cloud Blog:
- 134,000 TPUs connected into a single fabric within a single datacenter — one logical training substrate with no intra-datacenter network boundary
- More than 1,000,000 TPUs connectable across multiple datacenter sites into a unified training cluster
- The design intent: transform globally distributed infrastructure into “one seamless supercomputer”
For context, the largest disclosed cluster sizes at the time of the announcement are in the 50,000–131,072 GPU range. Microsoft’s Fairwater campus in Wisconsin was described as “one 800G AI supercomputer.” CoreWeave deployed NVIDIA Vera Rubin NVL72 at rack scale with claimed 10x inference efficiency. Google’s 134,000-TPU single-fabric claim is the largest published single-site training cohesion figure.
The 1M+ cross-site figure is more significant strategically. It means a training job can span Google’s global datacenter footprint as a single logical resource, removing the checkpointing and synchronisation overhead that currently constrains runs across geographically separate clusters.
Agentic Context
The agentic framing is not incidental. Google’s own compute is under pressure: reports emerged that DeepMind researchers were queuing for TPU scraps after Google sold large blocks of capacity to Anthropic and Meta. Anthropic has committed to a gigawatt-scale TPU deal with Google and Broadcom with capacity coming online in 2027. The Virgo Network’s ability to pool capacity across sites addresses the practical question of how Google supplies both external customers and internal research without under-provisioning either.
Intel’s foundry has locked 3M+ Google TPU orders by 2028. The 8th-gen TPU’s fabrication partner has not been disclosed. Google’s prior-generation TPU used TSMC; the new Icefish chip was announced to break from Broadcom and TSMC toward Samsung and MediaTek.
No pricing for 8th-gen TPU access on Google Cloud has been published.