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Google’s Tensor Processing Unit program runs on a foundational assumption: that it can out-build the Nvidia supply chain. In August 2026, SemiAnalysis cut its estimate for 2026 Ironwood (TPU v7) production from 3.2 million to 2.7 million units, citing CoWoS-S advanced packaging constraints. The 500,000-unit shortfall is roughly 16% of the original forecast — and it is not a rounding error.

The Packaging Bottleneck

Ironwood uses CoWoS-S (Chip-on-Wafer-on-Substrate), TSMC’s monolithic silicon interposer process. CoWoS-S capacity is shared across multiple large-die programs at TSMC, and SemiAnalysis specifically identified the second half of 2026 (2H26) as the window experiencing lower Ironwood output and a declining run-rate — timing that overlaps with competing CoWoS demand from other AI accelerator ramps. When capacity is contested across customers, schedules slip.

Alphabet Signals the Gap on Q2 Earnings

On its July 22, 2026 earnings call, Alphabet raised its full-year 2026 capex guidance to $195 billion to $205 billion, up from $180 billion to $190 billion set just one quarter earlier. Q2 2026 capex alone came in at $44.9 billion — 60% servers, 40% data centers and networking.

The more telling disclosure came in the forward guidance: management said Alphabet would expand the use of third-party compute capacity in Q3 2026 as a bridging strategy while building out more internal TPU capacity. The phrase “bridging strategy” is deliberate. Alphabet is not abandoning the TPU program. It is conceding that the Ironwood ramp is running behind demand.

Epoch AI’s Q4 2025 compute ownership data put roughly 80% of Alphabet’s owned AI compute capacity on its own TPUs versus Nvidia GPUs. The marginal Q3 2026 dollar tells a different story.

What Third-Party Means at This Scale

Alphabet does not identify its third-party compute providers publicly. Given the size of its infrastructure program and the available supply at scale, the primary options are Nvidia (GB200/GB300 NVL clusters) and AMD (MI350X arrays). Both have been adding to cloud capacity agreements with hyperscalers through 2026.

The disclosure also explains why Broadcom — which has co-designed Google’s TPUs across seven chip generations since 2014 — guided cautiously for the timing of future production ramps even while posting its strongest-ever AI semiconductor quarter. Broadcom fiscal Q3 2026 AI semiconductor revenue hit $16.7 billion, up 221% year-over-year and 54% quarter-over-quarter. CEO Hock Tan guided Q4 at $21.7 billion and set a fiscal 2027 target of $115 billion in AI chip revenue, with a fiscal 2028 doubling to $230 billion. Those figures are not purely Google — Broadcom’s two largest hyperscaler XPU customers also include Meta — but the trajectory tracks directly with how many Ironwood and future-generation chips can be manufactured.

The Capex Line Item That Doesn’t Exist

Alphabet reports total capex and a rough infrastructure split. It has never broken out server spending by chip vendor. Every estimate of the TPU-versus-Nvidia dollar allocation is analyst inference from Broadcom’s earnings, Epoch AI’s compute tracking, and disclosures like the Q2 2026 “third-party bridging” comment.

What the Q3 2026 posture clarifies is that the fraction of new AI spending going to third-party silicon is higher than the 80% TPU share of accumulated capacity would suggest. The installed base is TPU-heavy. The incremental build is mixed, and more mixed than it was a year ago.

The SemiAnalysis Ironwood cut and the Alphabet Q2 earnings language together are the most direct data points yet that Google’s in-house compute strategy has a supply constraint with a name: CoWoS-S.